Binary Coded Decimal format is a binary encoding of decimal numbers that represents each decimal digit by a fixed binary number. For example, 42 is represented in BCD format by the binary representations of 4 and 2, as shown above. The BCD format is common in electronic systems where numeric digits are displayed, as well as in systems where the rounding and conversion errors introduced by binary floating point representation and arithmetic are undesirable.
We will focus on designing a conversion circuit that converts a BCD formatted number to to a binary formatted number. I chose to detail this direction of conversion as binary to BCD conversion circuits are easily be found by a quick web search.
We will consider two algorithms to perform the conversion, the first being a direct arithmetic approach, and the second an iterative algorithm using a finite state machine with data path (FSMD).
We will be designing for the Basys 2 FPGA board which has 8 input switches. We can use the 8 input switches to encode 2 BCD numbers of 4 bits each. We will therefore concern ourselves with designing a circuit to convert a 2 digit BCD number to a 7 bit binary representation (27 = 128 > 99, the largest 2 digit BCD number we can input).
A stopwatch is a good FPGA project that covers many basic, yet interesting areas of FPGA design. We will need display multiplexing for the multi-digit display, synchronous cascaded counter circuits to increment time registers for seconds and minutes, and a finite state machine to give us start, stop, and reset functionality.
I recently acquired a Basys 2 FPGA development board, which has an on-board 4 digit seven-segment display that lends itself nicely to keeping track of time in MM.SS format. Let’s build a stopwatch.
Last time we outlined how to divide down an FPGAs clock frequency using a basic counter circuit. This allowed us to have varying blinking frequencies for our LEDs depending on which bits of the counter register we tied them to.
What if we needed to adjust for a specific frequency of blinking, of wanted to adjust the time the LED is on vs off? What we are looking for is a programmable square wave generator. I will show you how we can program an FPGA in Verilog to act as one that takes two 4-bit inputs to control the on/off periods of the square wave.
Once we have went through the process of adjusting the on/off timing of a square wave, creating an adjustable PWM output for an LED comes naturally. We will see how to program an FPGA to output a PWM signal that allows us to adjust the brightness of an LED based on a 4 bit input signal.
FPGA Development boards usually run on a high frequency oscillator in the tens or hundreds of Megahertz range. One way to toggle an IO line at a slower frequency is to use a counter circuit. I will show you how to write some Verilog code that divides down a high clock frequency to a more human friendly time scale, and blink some LEDs!